High Performance Computing Chapter wise Notes

1. High Performance Computing Mumbai University Updated Syllabus

2. Chapter 1. Introduction

3. Chapter 2. Pipeline Processing

4. Chapter 2 Pipe lining Techniques

5. Chapter 2 Pipeline Stage Design

6. Chapter 2 Hazard

7. Chapter 2 Dynamic Instruction Scheduling

8. Chapter 2 CDC scoreboarding

9. Chapter 3 Parallel Programming Platform

10. Chapter 3 Limitations of Memory System Performance

11. Chapter 3 Dichotomy of Parallel Computing Platforms

High Performance Computing most likely Questions

2 Marks

List and explain in brief Level of parallelism? Explain array processor? Discuss in brief SISD, SIMD? Discuss in brief MISD, MIMD?  Discuss SPMD, and MPMD? Describe Data Flow Computers? Describe Pipeline Architecture? Explain Asynchronous multiprocessor? Explain the schematics of the SIMD array processor architectures? What is a Hazard? Explain in Brief  Different classes of Hazard? List Flynn's classification? State Amdahl’s law?

5 Marks

		Explain The Pipeline stage design? Explain speedup, efficiency and throughput with suitable example. Consider the execution of a program of 15,000 instructions by a linear pipeline processor with a clock rate of 25MHz. Assume that the instruction pipeline has five stages and that one instruction is issued per clock cycle. The penalties due to branch instructions and out-of-sequence executions are ignored. (a) Calculate the speedup factor in using this pipeline to execute the program as compared with the use of an equivalent non-pipelined processor with an equal amount of flow-through delay. (b) What are the efficiency and throughput of this pipelined processor ? Elaborate the Pipeline performance? Explain with example Pipelining and Superscalar Execution? Explain the Limitations of Memory System Performance? Discuss in detail Control Structure of Parallel Platforms? Discuss Communication Model of Parallel Platforms?